Jetek-Pcb Co.,Limited
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Customer Privacy Policy

 

All information gathered from our dealings with fabrication orders are used strictly for our reference and would not be passed on to any third party. 

In the case where passing information is necessary to facilitate sub-contracting jobs to relevant party, we will inform our customer of such action. 

We agrees to protect user information with all possible ways, within the law of China. This include non-disclosure of customer information in regardless of request from any party at all unless such information is required to aid in criminal investigation. 

We agrees to not sell, rent or in anyway disclose customer information for our benefits in any kind. We understand the importance of such action and consequences towards privacy of user.

 

Panelizing & Merging Policy 

 

For prototype Service, we accepted and welcome customer to do Multiple-designs panelization on panel but there will have extra charge for this.

Each additional designs have extra USD 20.00 per  2 layer designs and extra USD 50.00 per 4 layer designs. 2 layer setup has a maximum limit of 4 designs on panel, 4 layer setup has a maximum limit of 2 designs on panel, 6 layer and more than 6 layer setup do not accept Multiple-designs on panel.

 

Non-Disclosure Policy

 

All engineering data and customer's information passed on to us would be treated as confidential information and would protected as such. 

We agrees to within all its capability to protect all engineering data submitted to us and to not disclose these data under any circumstances.  

 

 

Return & Rework Policy

 

All PCB made and sold are not returnable for a refund. 

We accept request for remake/rework or replace for PCB which is not built according to the given CAD or CAM files、Jobs with high level of fabrication defect、Quantity received is not the quantity promised、Quality issues.

We DO NOT compensate for the cost of components and working hours.

Please refer to FAQ page , after sales section for more details. 

 

Manufacturing Lead time Policy  


STANDARD TURNAROUND

LayerDelivery time(day)
0-0.50m²0.51-1m²1.01-3m²3.01-5m²5.01-10m²
145678
245678
4678911
67891012
889101213
10910111315
121011131415

Fastest turnaround

 ≤1m²1-3m²
2L1 days2 days
4L3 days4 days
6L4 days5 days

Daily cut-off time is 11:00 chinese time. If payment is after this time, the job will be considered next day's order.

Fast turnaround might costs extra charge to customer.

Orders accepted during holidays and weekend will be processed the next working day. EQ(Engineer Query) might gets job delay.

 

How to save Setup cost

 

Fit the different designs with same parameters onto one panel then can save setup fee.

 

In DXP/Altium, you can do Multi-design very fast and easy, click Here to learn how to operate in Altium.  Click Herefor how to export gerber file from Altium.

 

If you want to fit some different gerber files into one panel then you need a CAM software. Current we are using CAM350 and Genesis.

 

We give free setup to big volume(more than 3 sqm) order for standard 2 layer board, if your order is closed to 3 sqm volume, then you can make few more to keep enough 3 sqm then can get free setup cost. 

 

Protel design Tips

 

With Protel files the edge of the board must be defined by either mechanical layer 1 or the keep-out layer. Mechanical layer 1 takes precedence unless otherwise stated by the customer. Use a track of 0.001" to define the perimeter. If you are panelising the panel you must allow 0.100" between each pcb. If your boards are too close then production will be delayed while we seek your advice. When you panelise, DO NOT place a 0.100" thick track between the pcbs to indicate the router path.

 

Useful Hints For Protel Users

 

Check there are no holes in SMD pads in Protel. The program may indicate hole size not used, however, go to edit to verify hole size is 0.0mm When panelising, ensure the duplicate designator is turned on, otherwise the overlay numbering will change when panelising.

 

Useful hints for Autotrax users 

 

Block reading pcbs will ensure that components are not renumbered when panelising. TRAXSTD.LIB has most hole sizes wrong and sometimes puts holes on single layer pads. Single layer pads sometimes show HOLE SIZE "NOT USED". This does not mean there is no hole. Set the pad layer to multi layer then set the hole size to the required size ( 0 for no hole) and then set the pad layer back to the original layer. Strings are only displayed and printed in multiples of 0.012" with a minimum size of 0.036". Using sizes that are not multiples of 0.012 could result in strings overwriting other parts of the pcb. 

 

PCB design rules

 1oz/35um2oz/70um3oz/105um
Minimum trace widh4mil8mil10mil
Minimum clearance4mil8mil10mil
Minimum drilling tool12mil12mil12mil
Minimum pad for vias20mil28mil32mil
Minimum plateb slot26mil26mil26mil
Minimum Soldermask Clearance4mil4mil4mil
Minimum Soldermask dam4mil4mil4mil
Minimum Silkscreen Clearance4mil4mil4mil
Minimum Silkscreen line width6mil6mil6mil
Minimum Silkscreen text width32mil32mil32mil
Minimum copper/edge margin8mil8mil8mil

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